ARTICLE

SOLVING

DATACENTER

COMPUTE

CHALLENGES

Energy costs in the datacenter dominate TCO (Total Cost of Ownership). Processors consume ~60% of all power in Google datacenters  (1).   Efficient utilization of compute resources, which drive overall utilization efficiency, is a top priority for the datacenter industry. "Utilization drives TCO" (2).

 

The amount of data pouring into the datacenter continues to grow exponentially, and the size of applications executed by datacenter processors is also rapidly growing ‐ putting huge pressure on available compute resources.

 

New embarrassingly parallel workloads such as Deep Learning training are best served by purpose built architectures, predominantly GPU. But these purpose built GPUs and ASICs are not "general purpose CPUs" that are easily programmed in C++, which is by far the dominant language of code executing in the datacenter.

 

Most computing in the datacenter is still handled by Host x86 CPUs (i.e. Xeon) that are comprised of many‐core configurations of single core architectures such as SkyLake.

 

Instruction driven single threaded deeply pipelined CPU cores are the basis for all general purpose processor architectures (including SkyLake), however single thread CPU performance gains stalled 15 years ago, and is one of the reasons architects have been forced to multi‐core chips.

 

Ascenium has "thought outside the box" to crack the processor performance barrier. Rather than heroically attempting to elevate an alternate instruction driven deeply pipelined architecture (e.g. ARM) to the task, Ascenium bypasses existing architectural limitations by eliminating both the instruction driven model and the deep pipeline. Ascenium leverages the compiler to do much more of the work, allowing the run time hardware can be greatly simplified. To accomplish this disruptive approach, Ascenium leverages new compiler approaches.

 

The Ascenium Aptos then is a general purpose processor without an instruction set ‐ the first of a new class of Software Defined Processors ‐ programmed in standard High Level Languages such as C/C++.

 

Ascenium expects a single Aptos processor core to achieve significantly higher single-threaded single-core performance vs standard deeply pipelined  single-threaded single-core processors. However, industry insiders Ascenium has spoken to insist the datacenter TCO ROI is so high for improved compute efficiency in the datacenter (primarily due to energy cost savings), that even relatively small improvements in SPECint benchmark performance is sufficient to break into the market.

(1)   Partha Ranganathan (Google) et. al., The Datacenter as a Computer, 3rd ed, Morgan Claypool, 2019

(2)   Conversations with leading industry insiders

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